PA-RISC to IA-64: Transparent Execution, No Recompilation

T ransitioning to a new architecture is never easy. Users want to keep running their favorite applications as they normally would, without stopping to adapt them to a different platform. For some legacy applications the problem is more severe. Without all the source code, it is impossible to recompile the application to a new platform. Thus, porting these legacy applications is not just slow—it is impossible. Binary translation helps this transitioning process because it automatically converts the binary code from one instruction set to another without the need for high-level source code. There are many kinds of binary translation (see Eric R. Altman et al., “Welcome to Binary Translation,” pp. xxx-xxx), but users typically must trade off between some form of interpretation (or emulation) and static translation. Interpretation requires no user intervention but its performance is slow. Static translation, on the other hand, requires user intervention but provides much better performance. To help PA-RISC (Precision Architecture-Reduced Instruction Set Computing) users migrate to its upcoming IA-64 systems, HP has developed the Aries software emulator. As this article goes to press, it is the only software-based IA-64 migration product available. It is also unique because it combines fast interpretation and dynamic translation. Using its fast interpreter, Aries accurately emulates a complete set of PA-RISC instructions with no user intervention. During interpretation, it monitors the application’s execution pattern and translates only the frequently executed code into native IA-64 code at runtime. At the end of the emulation, Aries discards all the translated code without modifying the original application. Thus, dynamic translation provides fast emulation and preserves the integrity of the emulated PA-RISC application. With this combination of fast interpretation and dynamic translation, users can expect to execute PARISC applications transparently, accurately, and efficiently on any IA-64 system running the HP-UX operating system. HP plans to bundle Aries on all such systems, so users will merely install and run applications as they would on a native PA-RISC platform. This combination also provides instruction set architecture (ISA) emulation with a lower cost and higher performance relative to other emulation approaches. The fast interpreter emulates instruction blocks that rarely execute, while the dynamic translator boosts emulation performance by translating instruction blocks that frequently execute into native IA-64 code. For common applications that spend most of their time in a small part of code, emulation costs go down significantly because Aries translates only the most frequently executed code into native IA-64 instructions. At the same time, Aries boosts performance because translated code executes significantly faster than emulated code. The resources in the IA-64 architecture also make it easy to translate PA-RISC instructions. The IA-64 architecture has 128 general and 128 floating-point registers, versus the 32 general and 32 floating-point HP’s Aries emulator combines fast code interpretation with dynamic translation to execute PA-RISC applications transparently and accurately on IA-64 systems running HP-UX. HP plans to bundle Aries on all such systems, so users will merely install and run applications as they would on a native PA-RISC platform.